Combinational Logic

    BASICS

    • Half Adder
      Design a half adder circuit using Verilog. A half adder is a combinational circuit that computes the sum of two …
      Solve
    • Full Adder
      Design a full adder circuit using Verilog. A full adder adds a, b, and cin and outputs sum and cout.
      Solve
    • Half Subtractor
      Design a half subtractor which subtracts b from a and outputs diff and borrow.
      Solve
    • Full Subtractor
      Design a full subtractor that subtracts b and bin from a and outputs diff and bout.
      Solve
    • 2:1 Multiplexer
      Design a 2:1 multiplexer using Verilog with inputs A, B, select S and output Y.
      Solve
    • 4:1 Multiplexer
      Design a 4:1 Multiplexer circuit in Verilog.
      Solve
    • 1:2 DeMultiplexer
      Design a 1:2 DeMultiplexer circuit in Verilog.
      Solve
    • 1:4 DeMultiplexer
      Design a 1:4 DeMultiplexer circuit in Verilog.
      Solve
    • 2-bit Comparator
      Design a 2-bit Comparator circuit in Verilog. It must have two inputs, a and b. After comparing, it must give …
      Solve
    • 4-bit Comparator
      Design a 4-bit Comparator circuit in Verilog. It must have two inputs, a and b. After comparing, it must give …
      Solve
    • Half Adder using MUX
      Design a Half Adder using MUX circuit in Verilog. Use the pre-defined MUX in the user code, and assign appropriate …
      Solve
    • Half Subtractor using MUX
      Design a Half Subtractor using MUX circuit in Verilog.
      Solve

    ENC

    • 2-to-4 Decoder
      Design a 2-to-4 decoder. The output line corresponding to the input binary number should be high.
      Solve
    • 3-to-8 Decoder
      Implement a 3-to-8 decoder that sets only one output bit high for each input combination.
      Solve
    • 4-to-2 Encoder (without priority)
      Design a 4-to-2 encoder that produces a 2-bit binary code corresponding to which input is high.
      Solve
    • 8-to-3 Encoder (without priority)
      Create an 8-to-3 encoder that outputs the binary code of the active input.
      Solve
    • Priority Encoder (4-input)
      Design a 4-input priority encoder where the highest-priority active input is encoded.
      Solve